Udemy - RTL Finite State Machines in System Verilog

  • CategoryOther
  • TypeTutorials
  • LanguageEnglish
  • Total size382.6 MB
  • Uploaded Byfreecoursewb
  • Downloads5
  • Last checkedOct. 25th '24
  • Date uploadedOct. 25th '24
  • Seeders 2
  • Leechers4

Infohash : 0E7A4D9B006F571D7958B8C81E98CAE6FDFC018D

RTL Finite State Machines in System Verilog

https://DevCourseWeb.com

Published 10/2024
Created by Ninja S
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English | Duration: 35 Lectures ( 56m ) | Size: 382 MB

Finite State Machines are a fundamental building block in digital hardware designs.

What you'll learn:
Learn the design pattern for Register Transfer Level (RTL) descriptions of Finite State Machines in Digital Hardware
Hands on simulation of RTL Finite State Machine with a self checking test bench
Synthesis of RTL Finite State Machines
Optimization of RTL Finite State Machine to reduce Latency

Requirements:
Background in Digital Hardware Design (Electrical or Computer Engineering)
Exposure to an HDL (Verilog or VHDL) would be helpful
Taken course RTL Fundamentals in System Verilog (Recommended)

Files:

[ DevCourseWeb.com ] Udemy - RTL Finite State Machines in System Verilog
  • Get Bonus Downloads Here.url (0.2 KB)
  • ~Get Your Files Here ! 1 - Welcome to the course !
    • 1 -Introduction.mp4 (10.2 MB)
    • 2 - How to use this course.html (0.2 KB)
    • 2 -Learning Tips (Optional).mp4 (5.4 MB)
    • 3 -FSMs in Digital Logic.mp4 (11.4 MB)
    2 - Course Setup
    • 1 - Code Access.html (0.3 KB)
    • 1 - Read This.html (0.2 KB)
    3 - RTL FSM Design Pattern
    • 1 -RTL FSM Design Pattern.mp4 (8.7 MB)
    4 - RTL FSM Example
    • 1 -RTL GCD.mp4 (5.5 MB)
    • 2 -State Definitions.mp4 (20.9 MB)
    • 3 -Transition Arcs.mp4 (16.8 MB)
    • 4 -RTL Simulation - 1.mp4 (19.2 MB)
    • 5 -RTL Simulation - 2.mp4 (23.6 MB)
    • 6 -Synthesis.mp4 (27.9 MB)
    5 - RTL FSM - Fewer States
    • 1 -Measure Latency - 1.mp4 (31.3 MB)
    • 2 -Measure Latency - 2.mp4 (26.0 MB)
    • 3 -Fewer States.mp4 (32.4 MB)
    • 4 -Synthesis.mp4 (9.8 MB)
    6 - Extra Explicit One Hot Encoding
    • 1 -One-Hot Encoding.mp4 (8.6 MB)
    • 2 -GCDOne Hot Encoded.mp4 (25.5 MB)
    • 3 -Simulation.mp4 (4.9 MB)
    • 4 -Synthesis.mp4 (6.4 MB)
    • 5 -Gatesim.mp4 (13.0 MB)
    7 - Wrap Up
    • 1 -Wrap Up.mp4 (13.4 MB)
    8 - Docker Setup (Optional)
    • 1 - Recommended Setup Using Docker.html (0.7 KB)
    • 1 -Docker Windows Install (Optional).mp4 (14.0 MB)
    • 2 - Download Docker Image.html (0.3 KB)
    • 2 -Download Docker Image.mp4 (7.1 MB)
    • 3 - Run Docker with GUI (Windows).html (0.8 KB)
    • 3 -Run Docker with GUI (Windows).mp4 (6.7 MB)
    • 4 - Run Docker with GUI (Linux - Ubuntu).html (0.3 KB)
    • 4 - Run Docker with GUI (Mac OS).html (0.7 KB)
    • 4 -Test Install.mp4 (7.7 MB)
    • 5 - Troubleshooting.html (0.5 KB)
    9 - EDA Playground Setup (Optional)
    • 1 - Simulation Only Setup.html (0.3 KB)
    • 1 -EDA Playground Hints (Optional).mp4 (26.3 MB)
    • Bonus Resources.txt (0.4 KB)

Code:

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